Here is a set of introductory videos from Colfax International on Parallel Programming and Optimization with Intel(R) Xeon Phi(TM) Coprocessors.
Episode 2.1 - Purpose of the MIC architecture
In this video episode we will introduce Intel Xeon Phi coprocessors based on the Intel Many Integrated Core, or MIC, architecture and will cover some of the specifics of hardware implementation.
Episode 2.2 - Details of Intel MIC Architecture
In this video we will discuss the general properties of the Intel MIC architecture in detail, and then focus on vector instruction support.
Episode 2.3 - Vector Instruction Support in Intel Architectures
In this episode we will introduce vector instructions and discuss instructions that are supported on Intel Xeon Phi coprocessors.
Here is a link to more videos on Parallel Programming with Intel Xeon Phi Coprocessor from Colfax International.